关于MIPS32中ld伪指令编译后重复lui指令的疑问

Great question—let's break this down step by step to clear up the confusion.

First, let's recap what the ld pseudoinstruction does in MIPS32:

• ld $6, LEN is a pseudoinstruction built to load a 64-bit doubleword from memory. It splits this operation into two 32-bit loads: the lower 32 bits go into the specified even register ($6), and the upper 32 bits go into the immediately following odd register ($7).

Now, onto the redundant lui instructions you're seeing. Here's why they exist:

• MARS' assembler uses a simplistic approach when expanding pseudoinstructions. Instead of optimizing to reuse the base register ($1) that was already set by the first lui, it generates a full address setup for each underlying lw instruction.
• Logically, you're absolutely right: after the first lui $1, 0x00001001, $1 already holds the high 16 bits of the data's memory address. The second lui is completely unnecessary—we could just reuse $1 for the second lw $7, 0x00000004($1) and get the exact same result.

This isn't a flaw in the ld pseudoinstruction's design, but rather a limitation of MARS' assembly tooling:

• More mature MIPS assemblers (like GNU as) would optimize this code to remove the duplicate lui, since reusing the base register is safe and far more efficient.
• If you manually edit the compiled code to remove the second lui, your program will still work perfectly: $1 retains the correct high address, so lw $7, 0x00000004($1) will still pull the upper 32 bits of the doubleword as intended.

Your core understanding is spot-on: to load a contiguous 64-bit value, both lw instructions need to reference the same base address (with offsets 0 and 4). The duplicate lui is just MARS taking the easiest, unoptimized path in pseudoinstruction expansion—not a requirement of the MIPS architecture.

内容的提问来源于stack exchange，提问作者user84037