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SystemC技术问题:如何将sc_logic赋值给sc_lv的元素

How to Assign sc_logic Values to sc_lv Elements in SystemC

Hey there! I’ve dealt with this exact scenario when building SystemC arithmetic modules, so let’s walk through how to smoothly assign sc_logic values to individual elements of an sc_lv (logic vector).

Direct Index Assignment (The Simplest Way)

The sc_lv type in SystemC allows direct access to its elements using the square bracket [] operator, and these elements are natively compatible with sc_logic assignments.

For your 8-bit adder example, if you have an internal sc_signal<sc_logic> like fa_SUM, you can assign it directly to a position in your SUM output vector like this:

// Assign sc_logic value to the 0th position (LSB) of SUM
SUM[0] = fa_SUM;

Keep in mind that sc_lv<N> uses 0 as the least significant bit (LSB)—so SUM[7] would be the most significant bit (MSB) of your 8-bit sum.

Practical Example for Your 8-Bit Adder

Let’s expand this to fit your module structure. First, you’ll want to adjust your internal signals to handle the carry chain between full adders, then connect each full adder’s output to the corresponding sc_lv element:

#include <systemc.h>
#include "fullAdder.h"

SC_MODULE(eightBitAdder) {
public:
    // Array of full adder pointers (since we need 8 of them)
    fullAdder* fullAdder_p[8];

    // Input/output ports
    sc_in<bool> clk;
    sc_in<sc_lv<8>> A;
    sc_in<sc_lv<8>> B;
    sc_out<sc_lv<8>> SUM;
    sc_out<sc_logic> C_out;

    // Internal carry signals between full adders
    sc_signal<sc_logic> carry[7];

    SC_CTOR(eightBitAdder) {
        // Instantiate and connect each full adder
        for (int i = 0; i < 8; i++) {
            fullAdder_p[i] = new fullAdder(sc_gen_unique_name("full_adder"));

            // Connect A and B inputs (A[i]/B[i] returns sc_logic from the sc_lv)
            fullAdder_p[i]->A(A[i]);
            fullAdder_p[i]->B(B[i]);

            // Connect carry-in: first adder has 0 carry-in
            if (i == 0) {
                fullAdder_p[i]->Cin(sc_logic_0);
            } else {
                fullAdder_p[i]->Cin(carry[i-1]);
            }

            // Connect sum output directly to the sc_lv element
            fullAdder_p[i]->Sum(SUM[i]);

            // Connect carry-out: last adder's carry goes to C_out
            if (i == 7) {
                fullAdder_p[i]->Cout(C_out);
            } else {
                fullAdder_p[i]->Cout(carry[i]);
            }
        }
    }

    // Clean up dynamically allocated full adders
    ~eightBitAdder() {
        for (int i = 0; i < 8; i++) {
            delete fullAdder_p[i];
        }
    }
};

Key Notes to Avoid Pitfalls

  • Explicit Type Conversions: If you’re working with bool or sc_bool values, convert them to sc_logic explicitly (e.g., SUM[i] = sc_logic(true); or use the predefined constants sc_logic_0/sc_logic_1). Implicit conversions can lead to unexpected behavior.
  • Index Bounds: Make sure your indices stay within 0 to 7 for an sc_lv<8>—out-of-bounds access will cause undefined behavior.
  • Signal Update Timing: In sequential processes, remember that SystemC signals update at the end of a delta cycle. If you need to read a value immediately after assignment, use the read() method (e.g., SUM[i].read()).

内容的提问来源于stack exchange,提问作者ArcaGraphy

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最近更新时间:2026.05.26 10:25:43