NASM 64位编程中大小端机制相关内存访问问题咨询

Let’s break down both of these x86 assembly scenarios clearly, since they revolve around how memory addressing, operand widths, and little-endianness work in x86 systems.

I. First Code Snippet Analysis #

First, let’s recap the code in question:

arr dq 1234567887654321H
mov rsi, arr
mov rbx, [rsi]

Here’s a step-by-step breakdown of what’s happening:

1. arr dq 1234567887654321H defines an 8-byte (64-bit) quadword. Since x86 uses little-endian byte ordering, the bytes are stored in memory from lowest address to highest as:
   21H → 43H → 65H → 87H → 78H → 56H → 34H → 12H
   The least significant byte 21H sits at the lowest memory address, which is exactly what rsi points to after mov rsi, arr.
2. mov rbx, [rsi]: Since rbx is a 64-bit register, x86-64 automatically uses a 64-bit memory access here. This means it reads 8 consecutive bytes starting at the address in rsi (not just the single 21H byte), then reassembles them in little-endian order to form the original 64-bit value.

Conclusion for Scenario I #

The full 1234567887654321H value (all 8 bytes of arr) will be loaded into rbx, not just the 21H byte.

II. Second Code Snippet Analysis #

Recapping the key code snippets:

tempbuff resb 16
arr resb 1234567887654321H
mov rbx, qword[arr]
mov rsi, tempbuff
mov [rsi], rbx

Let’s focus on the critical memory operations:

1. mov rbx, qword[arr]: The qword specifier explicitly tells the assembler to perform a 64-bit memory read. Even though arr is defined with resb (reserves uninitialized bytes), this instruction reads 8 consecutive bytes starting at arr’s base address, assembles them in little-endian order, and stores the resulting 64-bit value in rbx.
   • Side note: Since arr is uninitialized, the value loaded into rbx will be whatever random data existed in that memory region.
2. mov [rsi], rbx: This writes the 64-bit value from rbx into memory starting at tempbuff (pointed to by rsi). Little-endian ordering applies here too: the least significant byte of rbx gets stored at the lowest address of tempbuff, followed by the next byte, and so on up to the most significant byte.

Conclusion for Scenario II #

• qword[arr] reads 8 bytes from arr’s start to fill rbx.
• The 64-bit value in rbx is then written as 8 consecutive bytes into the start of tempbuff, following little-endian byte order.

内容的提问来源于stack exchange，提问作者asn