如何在VHDL中实现含无关项的STD_LOGIC值与指定字符串的比较？

Ah, I've been in your shoes before—this is a super common gotcha with VHDL's STD_LOGIC type! The problem is that when you write (a,b,c,d) = "01-0", the '-' in the string isn't treated as a don't-care. Instead, it's interpreted as the strong unknown STD_LOGIC value ('-'), so your code is trying to check if c equals '-' (which is almost never what you want).

Luckily, there are three solid ways to fix this:

1. Use the std_match Standard Library Function #

The easiest and most clean solution is to use the std_match function from the IEEE std_logic_1164 library. This function is specifically designed to handle don't-care comparisons, treating '-' as "any value".

Here's how to implement it:

library ieee;
use ieee.std_logic_1164.all;

-- Inside your process or concurrent statement
if std_match(std_logic_vector'(a, b, c, d), "01-0") then
    -- Your logic here when the match is true
end if;

• std_logic_vector'(a, b, c, d) just packages your individual signals into a 4-bit STD_LOGIC vector for the comparison. If you already have a 4-bit vector (like signal input : std_logic_vector(3 downto 0);), you can just use that instead of the concatenation.
• std_match will return true if a='0', b='1', d='0', regardless of what c is.

2. Manual Condition Check (For Simple Cases) #

If you prefer to avoid library functions or are working with a very small number of don't-cares, you can explicitly write the condition to ignore the irrelevant signal:

if (a = '0') and (b = '1') and (d = '0') then
    -- We don't check c here, so any value of c is acceptable
    -- Your logic here
end if;

This works fine for small cases, but gets messy quickly if you have multiple don't-care bits.

3. Use the case? Statement (VHDL-2008+) #

If your toolchain supports VHDL-2008 (most modern tools like Vivado, Quartus, or Modelsim do, just make sure you set the language version in your project settings), you can use the case? statement, which natively supports don't-care patterns:

case? std_logic_vector'(a, b, c, d) is
    when "01-0" =>
        -- Your logic for the matched case
    when others =>
        -- Handle all other cases
end case?;

The case? statement uses '-' as a don't-care, so this behaves exactly like you expected your original equality check to work.

内容的提问来源于stack exchange，提问作者mark_infinite