如何获取GCC可生成的全部汇编指令列表？及x86汇编作业指令查找

Alright, let's break this down into two clear sections to address your questions properly:

There’s no single one-liner that makes GCC dump every assembly instruction it can generate—this depends entirely on your target architecture (x86, ARM, RISC-V, etc.) and the specific GCC version/backend you’re using. But here are practical, reliable ways to get this info:

• Consult official architecture manuals: For x86, start with Intel’s Software Developer Manuals or AMD’s Architecture Programmer’s Manual. These documents list every valid instruction for the architecture, and GCC supports nearly all of them (minus extremely niche or cutting-edge instructions depending on your version).
• Use GCC’s built-in defines: Run gcc -E -dM -march=native - < /dev/null | grep -E 'SSE|AVX|X86' to see which instruction set extensions your GCC recognizes for your CPU. Cross-reference these extensions with architecture docs to map them to specific instructions.
• Test with minimal C snippets: Write tiny C functions that would trigger specific instructions, then compile with gcc -S -O0 your_code.c to inspect the generated assembly. For example, a function that does x++ might emit the inc instruction, confirming GCC can generate it.
• Check binutils tools: Tools like objdump (part of binutils) know all instructions GCC can emit for your target. Run objdump -i to see supported architectures and instruction sets, then look up those sets’ full instruction lists.

First, let’s restate the rules to stay on track:

已讲解的24条指令：NOP、PUSH/POP、CALL/RET、MOV/LEA、ADD/SUB、JMP/Jcc、CMP/TEST、AND/OR/XOR/NOT、SHR/SHL、IMUL/DIV、REP STOS、REP MOV、LEAVE
后续讲解不计入的指令：SAL/SAR、跳转指令变体、MUL/IDIV变体等

Here are strong, valid candidates that fit the requirements, plus how to verify them:

• INC/DEC: These increment/decrement a register or memory location by 1. They’re fundamental, not in the covered list, and aren’t excluded. Test with:

  void inc_var(int *x) { (*x)++; }
  

  Compile with gcc -S -O0—you’ll see inc in the output assembly.
• XCHG: Swaps values between two registers (or a register and memory). It’s a common basic instruction, not covered, and not excluded. You can force it with inline asm if the compiler optimizes it away:

  void swap_regs() {
      int a = 1, b = 2;
      asm("xchg %0, %1" : "+r"(a), "+r"(b));
  }
  

• MOVSX/MOVZX: These handle sign-extended (movsx) or zero-extended (movzx) moves between different-sized registers (e.g., moving an 8-bit char to a 32-bit int while preserving its sign). Test with:

  int sign_extend(char c) { return c; }
  

  GCC will generate movsx for this conversion.
• CLC/STC/CMC: These control the carry flag (clear, set, or flip it). They’re basic flag-manipulation instructions, not covered, and not excluded. Use inline asm to test directly:

  void clear_carry() { asm("clc"); }
  

For your report, pick one of these, demonstrate how it works with a small code example, explain its purpose, and confirm it’s not in the covered or excluded lists. That’ll meet the assignment’s requirements perfectly.

内容的提问来源于stack exchange，提问作者Evan Carroll