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如何获取或生成TPC工作负载追踪?缓存设计评估技术问询

TPC Workload Memory Traces for Cache Design Evaluation

Great question—TPC workloads are perfect for stress-testing memory-centric architectures like custom cache designs, so you’re on the right track. Let’s tackle your two core questions:

Are Pre-Generated Memory Traces for TPC Workloads Available?

TPC’s official resources don’t provide pre-built memory access traces out of the box—their tools are focused on end-to-end system benchmarking (like throughput, latency, and scalability) rather than low-level hardware tracing. That said, you can often find shared traces from the academic and research community:

  • Many university research projects and GitHub repositories publish TPC-C/TPC-H memory traces they’ve generated for cache/memory architecture studies. These are usually tied to specific configurations (e.g., number of warehouses for TPC-C, dataset size for TPC-H), so make sure they align with your evaluation goals.
  • Always check the licensing terms for these datasets—some may require citation of the original research or restrict commercial use.

Best Practices for Generating Your Own TPC Memory Traces

If you can’t find a pre-existing trace that fits your needs, generating your own is totally feasible. Here’s a step-by-step approach:

1. Set Up the TPC Benchmark Environment

First, download the official toolset for your target workload (e.g., TPC-C, TPC-H) from the TPC website, then follow their documentation to deploy the required infrastructure:

  • For transactional workloads like TPC-C, you’ll need a compatible database (MySQL, PostgreSQL, or the official TPC-C implementation) and a properly scaled test environment (e.g., number of warehouses, client threads).
  • For analytical workloads like TPC-H, you’ll generate the dataset using the provided tools and run the query suite against a database or standalone engine.

2. Pick a Tracing Tool

Choose a tool that captures fine-grained memory read/write operations. Here are the most reliable options:

  • Intel Pin: A dynamic binary instrumentation tool that lets you inject custom code to track every memory access. Pin has pre-built example scripts (like memtrace) that you can modify to log address, operation type (read/write), and access size. It works across most x86 systems and doesn’t require special hardware.
  • Linux perf: A system-level profiling tool that can capture memory access events with perf record -e mem:mem_access -- <your-tpc-workload-command>. Note that default configurations may sample rather than capture every access—you’ll need to adjust settings for full tracing (which can be resource-intensive).
  • Hardware Tracing: If you have access to supported hardware (e.g., Intel Processor Trace, AMD Instruction-Based Sampling), you can capture hardware-level memory traces for the most accurate representation of real-world access patterns. This usually requires root privileges and specialized tools to parse the raw trace data.

3. Optimize Tracing for Your Use Case

  • Focus on the steady state: TPC workloads have an initialization phase (e.g., loading data, setting up connections) that may not reflect real-world cache behavior. Start tracing only after the workload reaches stable performance.
  • Filter unnecessary data: Decide if you need virtual or physical addresses, instruction vs. data accesses, or timestamps. Filtering out irrelevant details will keep your trace file size manageable.
  • Test with small configurations first: Use a scaled-down TPC setup (e.g., 1 warehouse for TPC-C) to debug your tracing pipeline before running full-scale tests—this saves time and storage.

4. Post-Process the Trace

Raw trace data is often unstructured or too large for simulators. Use scripts (Python, Perl, or even shell tools) to:

  • Extract key fields (operation type, address, size).
  • Convert the data into a format your simulator can parse (e.g., a plain text file with one access per line).
  • Remove redundant or noisy entries (e.g., accesses to system libraries that aren’t part of your target workload).

Quick Tips

  • Check recent architecture research papers—many authors share their trace generation workflows or even raw traces as supplementary material.
  • Be mindful of tracing overhead: Tools like Intel Pin can slow down the TPC workload significantly, so balance trace completeness with runtime performance.

内容的提问来源于stack exchange,提问作者samira

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最近更新时间:2026.05.15 04:50:17