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nrf52832 S132双信道DFU Bootloader启动报错:sd_softdevice_enable返回错误码1

Troubleshooting sd_softdevice_enable() Error Code 1 on nRF52832 (PCA10040) Bootloader

First, let's clarify: error code 1 from sd_softdevice_enable() maps to NRF_ERROR_SVC_HANDLER_MISSING. This usually means the SoftDevice can't locate critical infrastructure it needs to run—often tied to memory layout issues or misconfiguration. Let's dig into your linker script and common pitfalls to fix this.

1. Linker Script Red Flags to Fix

Your linker script has several issues that could directly cause this failure:

a. Duplicate SECTIONS Blocks

GNU ld doesn’t handle multiple separate SECTIONS blocks well—later blocks can override or ignore earlier section definitions. Merge all your section rules into a single SECTIONS block to ensure all memory regions and sections are properly accounted for.

b. SRAM Overlap Between SoftDevice and Bootloader

Look at your SRAM definitions:

SRAM_SOFTDEVICE (rwx) : ORIGIN = 0x20000000, LENGTH = 0x0005C10
RAM (rwx) : ORIGIN = 0x20005C11, LENGTH = 0x9D6F

The SoftDevice’s SRAM ends at 0x20000000 + 0x5C10 = 0x20005C10, but your bootloader RAM starts at 0x20005C11—that’s only 1 byte of separation, and worse, it’s not aligned to a 4-byte boundary (required for ARM Cortex-M cores). This creates overlap/misalignment that breaks SoftDevice initialization. Fix this by setting your bootloader RAM origin to 0x20005C10 (aligned, exactly at the end of SoftDevice SRAM).

c. SoftDevice Flash Region Validation

Double-check that your FLASH_SOFTDEVICE region matches the exact size of your S132 version:

  • S132 v6.1.1 uses 0x23000 bytes (matches your current setup)
  • S132 v7.3.0 uses 0x27000 bytes—if you’re using a newer version, your flash region is too small, corrupting SoftDevice data.

d. UICR and MBR Params Alignment

Your .uicrBootStartAddress section needs to ensure the bootloader start address (0x24000) is correctly written to the UICR 0x10001014 register. Also, verify the MBR_PARAMS_PAGE region is correctly sized and aligned—MBR requires this to be a full 4KB (0x1000) page, which your script has, but ensure it doesn’t overlap with bootloader flash.

2. Non-Linker Script Causes to Rule Out

Even with a fixed linker script, these issues can still trigger the error:

  • Missing MBR: The nRF52832 requires the Master Boot Record (MBR) to be flashed at 0x00000000 before the SoftDevice and bootloader. Skipping this step breaks SoftDevice initialization entirely.
  • SDK-SoftDevice Version Mismatch: Ensure your SDK version is compatible with your S132 version:
    • SDK 15.x ↔ S132 v6.x
    • SDK 17.x ↔ S132 v7.x
      Mismatched versions cause unexpected initialization failures.
  • Incorrect nrf_sdh Initialization Order: Before calling nrf_sdh_enable_request(), you must:
    1. Initialize logging (if used)
    2. Set SoftDevice configuration (e.g., nrf_sdh_ble_default_cfg_set())
    3. Call nrf_sdh_enable_request() (let it handle sd_softdevice_enable() internally)
      Calling sd_softdevice_enable() manually without nrf_sdh’s setup steps misses critical infrastructure.
  • Interrupt Vector Table Misconfiguration: The SoftDevice needs to take over the interrupt vector table. Don’t hardcode the vector table address in your bootloader—let nrf_sdh handle relocating it after SoftDevice initialization.

Fixed Linker Script Snippet (Merged Sections)

Here’s a cleaned-up version with key fixes:

SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
GROUP(S132_softdevice.o)

MEMORY {
  FLASH_SOFTDEVICE (rx) : ORIGIN = 0x00001000, LENGTH = 0x00023000
  FLASH (rx) : ORIGIN = 0x24000, LENGTH = 0x6CA00
  SRAM_SOFTDEVICE (rwx) : ORIGIN = 0x20000000, LENGTH = 0x0005C10
  RAM (rwx) : ORIGIN = 0x20005C10, LENGTH = 0x9D70  /* Adjusted length to fill remaining SRAM */
  NOINIT (rw) : ORIGIN = 0x2000F980, LENGTH = 0x80  /* Aligned to 4-byte boundary */
  BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0007F000, LENGTH = 0x1000
  UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
  MBR_PARAMS_PAGE (rw) : ORIGIN = 0x0007E000, LENGTH = 0x1000
  UICR_MBR_PARAM_PAGE(r) : ORIGIN = 0x10001018, LENGTH = 0x04
}

SECTIONS {
  /* Bootloader & MBR Configuration Sections */
  .bootloaderSettings(NOLOAD) : { } > BOOTLOADER_SETTINGS
  .uicrBootStartAddress : { KEEP(*(.uicrBootStartAddress)) } > UICR_BOOTLOADER
  .mbrParamsPage(NOLOAD) : { } > MBR_PARAMS_PAGE
  .uicrMbrParamsPageAddress : { KEEP(*(.uicrMbrParamsPageAddress)) } > UICR_MBR_PARAM_PAGE
  .noinit(NOLOAD) : { } > NOINIT

  /* SoftDevice Placement */
  . = ALIGN(4);
  .softdevice : {
    KEEP(*(.softdevice))
    FILL(0xFFFFFFFF);
    . = 0x00023000;
  } > FLASH_SOFTDEVICE

  .softdevice_sram : {
    FILL(0xFFFFFFFF);
    . = 0x00005C10;
  } > SRAM_SOFTDEVICE

  /* RAM-based Sections */
  .svc_data : {
    PROVIDE(__start_svc_data = .);
    KEEP(*(.svc_data))
    PROVIDE(__stop_svc_data = .);
  } > RAM

  .fs_data : {
    PROVIDE(__start_fs_data = .);
    KEEP(*(.fs_data))
    PROVIDE(__stop_fs_data = .);
  } > RAM

  .log_dynamic_data : {
    PROVIDE(__start_log_dynamic_data = .);
    KEEP(*(.log_dynamic_data))
    PROVIDE(__stop_log_dynamic_data = .);
  } > RAM

  .cli_sorted_cmd_ptrs : {
    PROVIDE(__start_cli_sorted_cmd_ptrs = .);
    KEEP(*(.cli_sorted_cmd_ptrs))
    PROVIDE(__stop_cli_sorted_cmd_ptrs = .);
  } > RAM

  /* Flash-based Sections */
  .dfu_trans : {
    PROVIDE(__start_dfu_trans = .);
    KEEP(*(SORT(.dfu_trans*)))
    PROVIDE(__stop_dfu_trans = .);
  } > FLASH

  .pwr_mgmt_data : {
    PROVIDE(__start_pwr_mgmt_data = .);
    KEEP(*(SORT(.pwr_mgmt_data*)))
    PROVIDE(__stop_pwr_mgmt_data = .);
  } > FLASH

  .log_const_data : {
    PROVIDE(__start_log_const_data = .);
    KEEP(*(.log_const_data))
    PROVIDE(__stop_log_const_data = .);
  } > FLASH

  .cli_command : {
    PROVIDE(__start_cli_command = .);
    KEEP(*(.cli_command))
    PROVIDE(__stop_cli_command = .);
  } > FLASH

  . = ALIGN(4);
  .sdh_stack_observers : {
    PROVIDE(__start_sdh_stack_observers = .);
    KEEP(*(SORT(.sdh_stack_observers*)))
    PROVIDE(__stop_sdh_stack_observers = .);
  } > FLASH

  . = ALIGN(4);
  .sdh_req_observers : {
    PROVIDE(__start_sdh_req_observers = .);
    KEEP(*(SORT(.sdh_req_observers*)))
    PROVIDE(__stop_sdh_req_observers = .);
  } > FLASH

  . = ALIGN(4);
  .sdh_state_observers : {
    PROVIDE(__start_sdh_state_observers = .);
    KEEP(*(SORT(.sdh_state_observers*)))
    PROVIDE(__stop_sdh_state_observers = .);
  } > FLASH

  . = ALIGN(4);
  .sdh_ble_observers : {
    PROVIDE(__start_sdh_ble_observers = .);
    KEEP(*(SORT(.sdh_ble_observers*)))
    PROVIDE(__stop_sdh_ble_observers = .);
  } > FLASH

  . = ALIGN(4);
  .sdh_soc_observers : {
    PROVIDE(__start_sdh_soc_observers = .);
    KEEP(*(SORT(.sdh_soc_observers*)))
    PROVIDE(__stop_sdh_soc_observers = .);
  } > FLASH
}

INSERT AFTER .data;
INSERT AFTER .text;

INCLUDE "nrf5x_common.ld"

PROVIDE(_sbss = __bss_start__);
PROVIDE(_ebss = __bss_end__);
PROVIDE(_sdata = __data_start__);
PROVIDE(_sidata = __etext);
PROVIDE(_estack = __StackTop);
PROVIDE(_edata =__data_end__);
PROVIDE(__isr_vector = __StackTop);

Start by fixing the SRAM overlap and merging sections, then verify your MBR, SDK/SoftDevice version compatibility, and initialization order. That should resolve the NRF_ERROR_SVC_HANDLER_MISSING error.

内容的提问来源于stack exchange,提问作者alxtford

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最近更新时间:2026.05.15 04:11:06