STM32F411与NRF24L01+ SPI通信同步异常问题排查
问题:STM32F411与NRF24L01+ SPI通信同步异常
我要实现NRF24L01+与STM32F411(STM32F411-Disco开发板)之间的通信。此前做过SPI主从架构通信,当时ChipSelect引脚始终保持低电平,但NRF24通信要求每次发送数据都切换CS引脚。
目前SPI无法正常工作,推测是SPI时钟启动与CS引脚存在不同步问题。若在CS引脚拉高前添加少量延迟,通信即可正常进行,逻辑分析仪截图可佐证该现象:
- 截图1:通信正常,CS拉高前存在延迟
- 截图2:延迟时间更长的情况
- 截图3:无延迟时的异常情况
#include <stdint.h> #include "stm32f4xx.h" void SPI1_INIT(void) { RCC->APB2ENR |= RCC_APB2ENR_SPI1EN; // Enable SPI1 Clock SPI1->CR1 |= SPI_CR1_BR_Msk; SPI1->CR1 |= SPI_CR1_MSTR; //Bit 2 MSTR: Master selection SPI1->CR1 |= SPI_CR1_SSM | SPI_CR1_SSI; SPI1->CR1 |= SPI_CR1_SPE; //Bit 6 SPE: SPI enable } void SPI1_GPIO_INIT(void) // PA4 - SPI1_NSS | PA5-SPI1_SCK | PA6-SPI1_MISO| PA7-SPI1_MOSI { RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; //Enable GPIOA Clock GPIOA->MODER |= GPIO_MODER_MODER4_0; //PA4 GPIO OUT mde GPIOA->MODER |= GPIO_MODER_MODER5_1; //Enable Alternate function mode for GPIOA PA5 GPIOA->MODER |= GPIO_MODER_MODER6_1; //Enable Alternate function mode for GPIOA PA6 GPIOA->MODER |= GPIO_MODER_MODER7_1; //Enable Alternate function mode for GPIOA PA7 GPIOA->AFR[0] |= 0x5UL<<GPIO_AFRL_AFSEL5_Pos; //GPIO alternate function set 0101 AF5 SPI PA5 GPIOA->AFR[0] |= 0x5UL<<GPIO_AFRL_AFSEL6_Pos; //GPIO alternate function set 0101 AF5 SPI PA6 GPIOA->AFR[0] |= 0x5UL<<GPIO_AFRL_AFSEL7_Pos; //GPIO alternate function set 0101 AF5 SPI PA7 } void spi_send(uint8_t data) { while(!(SPI1->SR & SPI_SR_TXE)); // Wait for TX buffer is emptly SPI1->DR = data; // Send data to TX buffer } uint8_t spi_receive(void) { while(!(SPI1->SR & SPI_SR_RXNE)); return SPI1->DR; } int main(void) { SPI1_GPIO_INIT(); SPI1_INIT(); for(;;){ GPIOA->BSRR = GPIO_BSRR_BR4; while(!(SPI1->SR & SPI_SR_TXE)); // Wait for TX buffer empty SPI1->DR = 0xFF; // Send data to TX buffer while(!(SPI1->SR & SPI_SR_TXE)); while ((SPI1->SR & SPI_SR_BSY)); //for(uint32_t i = 0; i<10; i++); GPIOA->BSRR = GPIO_BSRR_BS4; } }
更新
我通过调整SPI时钟频率解决了问题。原本时钟为62.5Khz,提升至4MHz后通信恢复正常,暂不清楚低时钟速率下故障的原因。

内容的提问来源于stack exchange,提问作者Ulfbeth
相关产品推荐
相关产品推荐

