关于RISC-V架构是否支持可忽略加载（dismissible loads）扩展的问询
To cut straight to the chase: there is no official, ratified RISC-V standard extension that implements the "dismissible loads" functionality you’ve described—where a rejected load request writes a default value (like zero) to the target register instead of triggering an exception (and potentially a segfault). From what’s publicly available and documented, this specific feature hasn’t been incorporated into any standard RISC-V extension yet.
Context & Potential Workarounds
While you won’t find a dedicated standard extension for this, there are a few ways to approximate similar behavior depending on your use case:
- Conditional load patterns: You could pair standard load instructions with conditional branches to only execute the load when the address is confirmed valid. But this defeats the performance goal of moving loads ahead of conditional branches, so it’s not a perfect substitute.
- Custom core extensions: If you’re working with a custom RISC-V core design, you can implement a custom dismissible load instruction (e.g.,
lw.dfor a dismissible word load). This would require modifying the core’s memory access unit to catch invalid accesses for this instruction and write zero to the destination register instead of raising an exception. You’d also need to update your toolchain to support the new instruction. - Core-specific MPU configurations: Some RISC-V cores with memory protection units (MPUs) let you configure certain memory regions to return default values on invalid accesses. This is a hardware-specific feature though, not a standard extension, and it doesn’t offer per-instruction granularity like true dismissible loads.
Future Possibilities
RISC-V’s extension ecosystem is always evolving. If dismissible loads would provide meaningful performance gains for non-speculative execution cores, this feature could be proposed as a new extension through RISC-V International’s formal standardization process. As of now, however, there’s no public draft or active, widely documented discussion around such an extension.
内容的提问来源于stack exchange，提问作者David Monniaux
