load/store relaxed atomic与普通变量的区别：汇编相同是否真无差异？

Great question! Let's break this down clearly, since it's a common point of confusion when learning about C++ atomics.

Even if the assembly looks the same, the behavior guaranteed by the C++ standard is worlds apart:

• Guaranteed Atomicity: For regular variables, multi-threaded reads/writes can tear (e.g., a 64-bit integer on a 32-bit system might be read/written as two separate 32-bit operations, leading to partial values being seen by other threads). Relaxed atomic operations guarantee that the read/write is indivisible—other threads will never see a half-completed state.
• Memory Visibility: Regular variables are subject to aggressive compiler and CPU optimizations. The compiler might cache the variable in a register (never writing it back to main memory in some cases) or reorder operations around it, meaning changes made by one thread might never be seen by another. Relaxed atomics ensure that once an operation completes, its result will eventually be visible to other threads (the compiler/CPU can't completely elide the memory interaction).
• Optimization Barriers: Compilers won't perform certain optimizations on relaxed atomic operations. For example, they can't hoist an atomic load out of a loop (forcing a fresh read every iteration) or merge multiple atomic stores into one. Regular variables get no such protection—compilers will optimize them as aggressively as possible for single-threaded performance.

The test case you referenced uses ARM architecture, where aligned ldr (load) and str (store) instructions are natively atomic. That means the hardware already ensures those operations can't be torn, so the compiler doesn't need to emit special instructions (like lock prefixes on x86) to make them atomic.

But don't be fooled by the identical instructions—the compiler's treatment of these operations is very different:

• For regular variables, the compiler can reorder instructions freely (as long as single-threaded behavior is preserved). For relaxed atomics, while they don't enforce strict ordering with other operations, the compiler still can't reorder atomic operations in ways that would break the atomicity guarantee, and must ensure that the operation interacts with memory (not just registers).
• For example, if you have a loop reading a regular variable, the compiler might read it once into a register and reuse that value for the entire loop. For a relaxed atomic variable, it has to perform a fresh memory read every iteration.

To put it simply: The assembly instruction is the same, but the "rules" the compiler and CPU follow when executing that instruction are drastically different. Those rules are what make relaxed atomics safe for multi-threaded use, while regular variables are not.

内容的提问来源于stack exchange，提问作者LongLT