交叉编译Halide至RISC-V时触发Ramp lanes<=1异常，求调试方法

在x86架构的Ubuntu 20.04主机上，针对RISC-V目标架构交叉编译Halide代码时，仅添加.vectorize(x, 16)向量优化操作就会触发IR.cpp内部异常，推测问题出在RISC-V向量支持模块，本地编译x86目标则无异常。

环境信息 #

• Halide版本：commit 16243da75944ce9ea8d4e8eb90d6f104f06284ec
• LLVM版本：15.0.2

测试代码 #

#include "Halide.h"

using namespace Halide;

int main(int argc, char** argv) {
    Func brighter;
    Var x, y;

    Param<uint8_t> offset;
    ImageParam input(type_of<uint8_t>(), 2);
    std::vector<Argument> args(2);
    args[0] = input;
    args[1] = offset;

    brighter(x, y) = input(x, y) + offset;

    brighter.bound(x, 0, 64).bound(y, 0, 64);

    brighter.vectorize(x, 16).parallel(y);

    Target target;
    target.os = Target::Linux;
    target.arch = Target::RISCV;
    target.bits = 64;

    std::vector<Target::Feature> features;
    features.push_back(Target::RVV);
    target.set_features(features);

    try {
        brighter.compile_to_static_library("compiled", args, "brighter", target);
    } catch(Halide::InternalError& ex) {
        std::cout << ex.what() << std::endl;
    }
}

异常信息 #

Internal Error at /home/dkurt/Halide/src/IR.cpp:272 triggered by user code at : Condition failed: lanes > 1: Ramp of lanes <= 1

内容的提问来源于stack exchange，提问作者Dmitry Kurtaev