VHDL模块综合失败：case语句缺少分支11，编译报错

主要错误原因 #

• Case语句未覆盖所有状态：state_logic进程中的case语句缺少对St_Out状态的处理，这是触发"Missing choices 11"错误的直接原因。
• 进程敏感列表不完整：state_logic进程仅对state敏感，但代码中使用了valid和din信号，会导致仿真与综合结果不一致。
• 多驱动冲突：next_state信号被state_logic和output_logic两个进程同时驱动，违反VHDL单驱动规则。
• 逻辑矛盾：
  • St_ERROR状态中的嵌套if条件不可能成立（同一时钟周期内din无法同时等于多个不同值）。
  • St_DECODE状态中的嵌套if逻辑永远无法触发（如din="001"时又检查din="010"），且无用的for循环冗余。
  • din > "111"条件永远为假（3位std_logic_vector最大值为"111"），导致错误分支无法触发。
• 未赋值信号：error信号从未被赋值，dvalid信号赋值逻辑不正确。

修复后的代码 #

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

entity mucodec is
    port (
        din     : IN std_logic_vector(2 downto 0);
        valid   : IN std_logic;
        clr     : IN std_logic;
        clk     : IN std_logic;
        dout    : OUT std_logic_vector(7 downto 0);  -- 改为OUT，原代码未使用输入功能
        dvalid  : OUT std_logic;
        error   : OUT std_logic
    );
end mucodec;

architecture Behavioral of mucodec is
    type state_type is (St_RESET, St_ERROR, St_BOS_1, St_BOS_2, St_BOS_3, St_BOS_4, St_EOS_1, St_EOS_2, St_EOS_3, St_EOS_4, St_DECODE, St_Out);
    signal state, next_state : state_type := St_RESET;
    
    -- 新增信号：错误恢复序列计数、存储前一个din值
    signal error_recovery_cnt : integer range 0 to 3 := 0;
    signal prev_din : std_logic_vector(2 downto 0) := (others => '0');

begin
    sync_process: process (clk, clr)
    begin
        if clr = '1' then
            state <= St_RESET;
            error_recovery_cnt <= 0;
            prev_din <= (others => '0');
        elsif rising_edge(clk) then
            state <= next_state;
            prev_din <= din;  -- 存储当前din作为下一个周期的前值
            -- 更新错误恢复计数器
            if state = St_ERROR then
                if valid = '1' then
                    error_recovery_cnt <= error_recovery_cnt + 1;
                else
                    error_recovery_cnt <= 0;
                end if;
            else
                error_recovery_cnt <= 0;
            end if;
        end if;
    end process;

    state_logic: process (state, valid, din, error_recovery_cnt, prev_din)
    begin
        -- 默认赋值，避免锁存器生成
        next_state <= state;
        dout <= (others => '0');
        dvalid <= '0';
        error <= '0';

        case state is
            when St_RESET =>
                if valid = '1' then
                    next_state <= St_BOS_1;
                end if;

            when St_ERROR =>
                error <= '1';
                -- 错误恢复：连续接收000、111、000、111四个有效数据
                case error_recovery_cnt is
                    when 0 =>
                        if valid = '1' and din /= "000" then
                            error_recovery_cnt <= 0;
                        end if;
                    when 1 =>
                        if valid = '1' and din /= "111" then
                            error_recovery_cnt <= 0;
                        end if;
                    when 2 =>
                        if valid = '1' and din /= "000" then
                            error_recovery_cnt <= 0;
                        end if;
                    when 3 =>
                        if valid = '1' and din = "111" then
                            next_state <= St_DECODE;
                        elsif valid = '1' then
                            error_recovery_cnt <= 0;
                        end if;
                end case;

            when St_BOS_1 =>
                if valid = '1' then
                    if din = "000" then
                        next_state <= St_BOS_2;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_BOS_2 =>
                if valid = '1' then
                    if din = "111" then
                        next_state <= St_BOS_3;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_BOS_3 =>
                if valid = '1' then
                    if din = "000" then
                        next_state <= St_BOS_4;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_BOS_4 =>
                if valid = '1' then
                    if din = "111" then
                        next_state <= St_DECODE;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_EOS_1 =>
                if valid = '1' then
                    if din = "111" then
                        next_state <= St_EOS_2;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_EOS_2 =>
                if valid = '1' then
                    if din = "000" then
                        next_state <= St_EOS_3;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_EOS_3 =>
                if valid = '1' then
                    if din = "111" then
                        next_state <= St_EOS_4;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_EOS_4 =>
                if valid = '1' then
                    if din = "000" then
                        next_state <= St_Out;
                    else
                        next_state <= St_ERROR;
                    end if;
                end if;

            when St_DECODE =>
                if valid = '1' then
                    -- 基于连续两个din值解码
                    case prev_din is
                        when "001" =>
                            case din is
                                when "010" => dout <= x"41";
                                when "011" => dout <= x"42";
                                when "100" => dout <= x"43";
                                when "101" => dout <= x"44";
                                when "110" => dout <= x"45";
                                when others => next_state <= St_ERROR;
                            end case;
                        when "010" =>
                            case din is
                                when "001" => dout <= x"46";
                                when "011" => dout <= x"47";
                                when "100" => dout <= x"48";
                                when "101" => dout <= x"49";
                                when "110" => dout <= x"4A";
                                when others => next_state <= St_ERROR;
                            end case;
                        when "011" =>
                            case din is
                                when "001" => dout <= x"4B";
                                when "010" => dout <= x"4C";
                                when "100" => dout <= x"4D";
                                when "101" => dout <= x"4E";
                                when "110" => dout <= x"4F";
                                when others => next_state <= St_ERROR;
                            end case;
                        when "100" =>
                            case din is
                                when "001" => dout <= x"50";
                                when "010" => dout <= x"51";
                                when "011" => dout <= x"52";
                                when "101" => dout <= x"53";
                                when "110" => dout <= x"54";
                                when others => next_state <= St_ERROR;
                            end case;
                        when "101" =>
                            case din is
                                when "001" => dout <= x"55";
                                when "010" => dout <= x"56";
                                when "011" => dout <= x"57";
                                when "100" => dout <= x"58";
                                when "110" => dout <= x"59";
                                when others => next_state <= St_ERROR;
                            end case;
                        when "110" =>
                            case din is
                                when "001" => dout <= x"5A";
                                when "010" => dout <= x"5B";
                                when "011" => dout <= x"5C";
                                when "100" => dout <= x"5D";
                                when "101" => dout <= x"5E";
                                when others => next_state <= St_ERROR;
                            end case;
                        when others =>
                            next_state <= St_ERROR;
                    end case;
                    dvalid <= '1';
                    next_state <= St_EOS_1;
                end if;

            when St_Out =>
                if valid = '1' then
                    next_state <= St_RESET;
                end if;
        end case;
    end process;

end Behavioral;

关键修复点说明 #

• 补全Case语句：添加St_Out状态分支，解决"Missing choices"错误。
• 修正敏感列表：state_logic进程添加所有用到的输入信号，避免仿真与综合差异。
• 消除多驱动：移除output_logic进程，将其逻辑合并到state_logic中，确保next_state单驱动。
• 修复错误恢复逻辑：使用计数器跟踪错误恢复序列进度，替代原矛盾的嵌套if。
• 修正解码逻辑：新增prev_din信号存储前一周期输入，实现基于连续两个din值的有效解码。
• 完善无效数据处理：将原din > "111"的无效条件改为检查非预期din值，触发错误状态。
• 补全信号赋值：正确赋值error和dvalid信号，避免未赋值导致的综合问题。

内容的提问来源于stack exchange，提问作者B_P