Verilog交通灯代码编译报多驱动错误(10028/10029)求解决方案
Verilog交通灯代码多驱动错误解决方法
作为Verilog新手,我在开发一款LED定时切换的交通灯逻辑代码时,编译过程中持续出现多驱动相关错误。尝试调整代码结构、修改变量定义后仍无法解决,现求助解决方案。
原代码
module traffic_light(clk, reset, G1, Y1, R1, G2, Y2, R2); input clk, reset; output reg G1, Y1, R1, G2, Y2, R2; // parameters for each light control parameter GREEN = 3'b001, YELLOW = 3'b010, RED = 3'b100, LEFT_GREEN = 3'b101, // assume both red and green will be turned on LEFT_YELLOW = 3'b110; // assume both red and yellow will be turned on // finite-state definition (Moore Type): // --------------------------- // NSlight EWlight // --------------------------- parameter S0 = 3'd0, // GREEN RED S1 = 3'd1, // YELLOW RED S2 = 3'd2, // RED, GREEN RED S3 = 3'd3, // RED, YELLOW RED S4 = 3'd4, // RED GREEN S5 = 3'd5, // RED YELLOW S6 = 3'd6, // RED RED, GREEN S7 = 3'd7; // RED RED, YELLOW // internal state variables reg [2:0] state, next_state; integer t1 = 19, t2 = 4; integer count; // buttons are appropriate for use as clock or reset inputs in a circuit always @(posedge clk, negedge reset) if(reset == 'b0) // button pressed, when reset is active low begin next_state = S0; count = t1; end else state <= next_state; always @(next_state) begin next_state = S0; count = t1; case(state) S0: if (count < 0) // load: if the count reaches below 0, reset begin count <= t2; next_state <= S1; end else // enable begin // down count count <= count - 1; // assign LEDs G1 <= 1; Y1 <= 0; R1 <= 0; G2 <= 0; Y2 <= 0; R2 <= 1; end S1: if (count < 0) begin count <= t1; next_state <= S2; end else begin G1 <= 0; Y1 <= 1; R1 <= 0; G2 <= 0; Y2 <= 0; R2 <= 1; count <= count - 1; end S2: if (count < 0) begin count <= t2; next_state <= S3; end else begin G1 <= 1; Y1 <= 0; R1 <= 1; G2 <= 0; Y2 <= 0; R2 <= 1; count <= count - 1; end S3: if (count < 0) begin count <= t1; next_state <= S4; end else begin G1 <= 0; Y1 <= 1; R1 <= 1; G2 <= 0; Y2 <= 0; R2 <= 1; count <= count - 1; end S4: if (count < 0) begin count <= t1; next_state <= S5; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 1; Y2 <= 0; R2 <= 0; count <= count - 1; end S5: if (count < 0) begin count <= t1; next_state <= S6; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 0; Y2 <= 1; R2 <= 0; count <= count - 1; end S6: if (count < 0) begin count <= t2; next_state <= S7; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 1; Y2 <= 0; R2 <= 1; count <= count - 1; end S7: if (count < 0) begin count <= t1; next_state <= S0; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 0; Y2 <= 1; R2 <= 1; count <= count - 1; end endcase end endmodule
编译报错信息
- Error (10028): Can't resolve multiple constant drivers for net "next_state.S0" at traffic_light.v(41)
- Error (10029): Constant driver at traffic_light.v(32)
- Error (10028): Can't resolve multiple constant drivers for net "next_state.S1" at traffic_light.v(41)
- Error (10028): Can't resolve multiple constant drivers for net "next_state.S2" at traffic_light.v(41)
- Error (10028): Can't resolve multiple constant drivers for net "next_state.S3" at traffic_light.v(41)
- Error (10028): Can't resolve multiple constant drivers for net "next_state.S6" at traffic_light.v(41)
- Error (10028): Can't resolve multiple constant drivers for net "next_state.S7" at traffic_light.v(41)
- Error (12152): Can't elaborate user hierarchy "traffic_light:inst"
问题解决与修正代码
问题根源为同一变量不能在多个always块中赋值。以下是修正后的代码:
module traffic_light(clk, reset, G1, Y1, R1, G2, Y2, R2, time_); input clk, reset; output reg G1, Y1, R1, G2, Y2, R2; output reg [4:0] time_; // added, it displays the remaining time // parameters for each light control parameter GREEN = 3'b001, YELLOW = 3'b010, RED = 3'b100, LEFT_GREEN = 3'b101, // assume both red and green will be turned on LEFT_YELLOW = 3'b110; // assume both red and yellow will be turned on // finite-state definition (Moore Type): // --------------------------- // NSlight EWlight // --------------------------- parameter S0 = 3'd0, // GREEN RED S1 = 3'd1, // YELLOW RED S2 = 3'd2, // RED, GREEN RED S3 = 3'd3, // RED, YELLOW RED S4 = 3'd4, // RED GREEN S5 = 3'd5, // RED YELLOW S6 = 3'd6, // RED RED, GREEN S7 = 3'd7; // RED RED, YELLOW // internal state variables and time settings reg [2:0] state, next_state; integer t1 = 19, t2 = 4; reg count; // changed to count only always @(posedge clk) if(reset == 0) // button pressed, when reset is active low begin state <= S0; time_ <= t1; end else begin state <= next_state; time_ <= count; end always @(*) // changed according to advice in the comment case(state) S0: if (count < 0) // load: if the count reaches below 0, reset begin count <= t2; next_state <= S1; end else // enable begin // down count count <= count - 1; // assign LEDs G1 <= 1; Y1 <= 0; R1 <= 0; G2 <= 0; Y2 <= 0; R2 <= 1; end S1: if (count < 0) begin count <= t1; next_state <= S2; end else begin G1 <= 0; Y1 <= 1; R1 <= 0; G2 <= 0; Y2 <= 0; R2 <= 1; count <= count - 1; end S2: if (count < 0) begin count <= t2; next_state <= S3; end else begin G1 <= 1; Y1 <= 0; R1 <= 1; G2 <= 0; Y2 <= 0; R2 <= 1; count <= count - 1; end S3: if (count < 0) begin count <= t1; next_state <= S4; end else begin G1 <= 0; Y1 <= 1; R1 <= 1; G2 <= 0; Y2 <= 0; R2 <= 1; count <= count - 1; end S4: if (count < 0) begin count <= t2; next_state <= S5; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 1; Y2 <= 0; R2 <= 0; count <= count - 1; end S5: if (count < 0) begin count <= t1; next_state <= S6; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 0; Y2 <= 1; R2 <= 0; count <= count - 1; end S6: if (count < 0) begin count <= t2; next_state <= S7; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 1; Y2 <= 0; R2 <= 1; count <= count - 1; end S7: if (count < 0) begin count <= t1; next_state <= S0; end else begin G1 <= 0; Y1 <= 0; R1 <= 1; G2 <= 0; Y2 <= 1; R2 <= 1; count <= count - 1; end default: begin next_state <= S0; count <= t1; end endcase endmodule
内容的提问来源于stack exchange,提问作者Doyeon.K
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