Atmel SAM3X/SAM3A处理器PIOA8引脚NVIC中断配置咨询

Got it, let's work through your PA8 interrupt setup issue step by step. First, we'll clear up the interrupt number confusion, then fix a critical pin bit mismatch I noticed in your current config, and wrap up with the correct NVIC setup.

1. PA8's Interrupt Channel #

On SAM3X/SAM3A processors, all PIOA pins (including PA8) share a single NVIC interrupt channel: PIOA_IRQn, which has a fixed interrupt number of 29. You can confirm this in the sam3x.h header file (part of the CMSIS package) where it's defined as a macro. There's no separate interrupt number for individual PIOA pins—all pin interrupts for the port trigger this single IRQ, and you'll check the PIO status register in the interrupt service routine (ISR) to identify which pin fired.

2. Fix Your Pin Configuration (Critical Mistake!) #

Wait a second—you're configuring bits at position 7 in all your PIOA registers, but PA8 corresponds to bit 8 of the PIOA register set (PA0 = bit 0, PA1 = bit 1, ..., PA8 = bit 8). This is a showstopper—your current config is targeting PA7, not PA8. Here's the corrected pin setup (matching your original intent):

• PIOA_MDER[8] = 0 & PIOA_MDDR[8] = 0: Disable multiplexing, set as general-purpose PIO
• PIOA_OER[8] = 0 & PIOA_ODR[8] = 1: Configure as input
• PIOA_RHLSR[8] = 1 & PIOA_FELLSR[8] = 0: Trigger on rising edge
• PIOA_ESR[8] = 1: Enable edge-triggered interrupts (not level-triggered)
• PIOA_LSR[8] = 0: Disable level detection
• Don't forget this last step: PIOA_IER[8] = 1—this enables the interrupt for PA8 (you didn't mention this, and it's required for the pin to trigger interrupts)

3. NVIC Priority & Activation #

You want both group (preemptive) and subpriority set to 3. First, make sure your system's NVIC priority grouping is set to support this—for example, using grouping 3 (2 bits for preemptive priority, 2 bits for subpriority) lets you set values from 0-3 for both.

Using CMSIS Library Functions (Simpler) #

If you're using the standard CMSIS library for SAM3X, use these calls:

// Enable the PIOA interrupt channel in NVIC
NVIC_EnableIRQ(PIOA_IRQn);

// Set priority: preemptive = 3, subpriority = 3 (adjust shift if your grouping differs)
NVIC_SetPriority(PIOA_IRQn, (3 << 2) | 3);

Direct Register Access (If You're Avoiding Libraries) #

If you prefer to manipulate registers directly:

// Enable PIOA interrupt (set bit 29 in NVIC_ISER0)
NVIC->ISER[0] |= (1UL << 29);

// Set priority (assuming grouping 3: 2 bits preemptive, 2 bits subpriority)
// Combine preemptive (3 = 0b11) and subpriority (3 = 0b11) into 0b1111 = 15
// Write to the high 4 bits of the 8-bit priority register for IRQ 29
NVIC->IP[29] = (15 << 4);

4. Interrupt Service Routine (ISR) #

Finally, you need to write the ISR to handle the interrupt, and clear the interrupt flag (otherwise the interrupt will fire repeatedly):

void PIOA_Handler(void) {
    // Check if PA8 triggered the interrupt
    if (PIOA->ISR & (1UL << 8)) {
        // Add your custom interrupt handling code here
        // ...

        // Clear the interrupt flag by writing 1 to the bit position
        PIOA->ISR = (1UL << 8);
    }
}

That should get your PA8 rising-edge interrupt working correctly. Double-check the bit positions first—fixing that PA7/PA8 mixup is the most important step here.

内容的提问来源于stack exchange，提问作者m0ss