32位架构中指针为何不采用double的8字节长度以实现类64位宽寻址？

Great question—this cuts straight to the core tradeoffs CPU architects weigh when defining an instruction set and memory model. Let’s break down the key reasons:

• Hardware Fundamentals Dictate the Design
  A "32-bit architecture" gets its name from the width of its general-purpose registers: they’re 32 bits (4 bytes) wide. If pointers were 8 bytes, the CPU couldn’t fit a full pointer into a single register. Every pointer operation—dereferencing, adding an offset, passing to a function—would require splitting the pointer across two registers, slowing execution to a crawl and forcing a full redesign of the CPU’s arithmetic logic unit (ALU), register file, and basic instruction set. At that point, it’s no longer a 32-bit architecture—it’s a 64-bit one.

• Memory Cost & Real-World Demand at the Time
  When 32-bit architectures hit the mainstream (think the 1990s to early 2000s), most consumer systems had just a few hundred megabytes of RAM. A 4-byte pointer can address up to 4GB of memory, which was way more than most systems needed back then. Using 8-byte pointers would waste precious memory: every pointer in linked lists, object arrays, function pointers, etc., would take twice as much space. In an era where 128MB of RAM was considered "plenty," doubling pointer overhead was a non-starter.

• Software Ecosystem Compatibility
  The entire 32-bit software stack—operating systems, compilers, and all existing applications—was built around 4-byte pointers. Switching to 8-byte pointers would break every single piece of software written for the architecture. Rewriting everything to support the wider pointer size would be an enormous, impractical cost. Compare that to double: it uses 8 bytes because IEEE 754 double-precision floating-point requires 64 bits to deliver its promised precision. That’s a functional requirement for numerical accuracy, not memory addressing, so it doesn’t conflict with the 32-bit system’s core design.

• Power & Performance Tradeoffs
  Wider pointers mean more data transferred between memory and CPU, plus a larger cache footprint. A 4-byte pointer takes half the space of an 8-byte one, so a CPU cache can store twice as many pointers. Better cache hit rates directly translate to faster performance. For the low-power embedded systems and early PCs that 32-bit architectures targeted, this efficiency was critical—wasting power and performance on unnecessary pointer width made no sense.

In short, pointer length in an architecture is tied to core hardware design, real-world usage constraints, and the existing software ecosystem—not just matching the size of another data type. double uses 8 bytes because it needs that space for precision, while 32-bit pointers use 4 bytes because that’s the sweet spot for the architecture’s intended use cases.

内容的提问来源于stack exchange，提问作者Progear