ARMv6M ADD(寄存器)T2编码中DN字段含义及设计疑问咨询

Great question—this is one of those subtle instruction set design choices that balances code density, hardware efficiency, and functionality. Let’s break this down step by step.

What Does "DN" Actually Represent? #

In the ARMv6-M Thumb instruction set, the DN bit is a register group selector for the destination register (Rdn):

• When DN = 0, the 3-bit Rdn field directly maps to the low register bank: values 0–7 correspond to r0–r7.
• When DN = 1, the 3-bit Rdn field maps to the high register bank: values 0–7 correspond to r8–r15.

In short, DN extends the 3-bit Rdn field to cover all 16 general-purpose registers (r0–r15) without requiring an extra full bit in the Rdn field itself.

Why Not Merge DN Into the Rdn Field? #

The core reason boils down to 16-bit Thumb instruction density and hardware decoding efficiency, with three key factors:

• Code density constraints: Thumb-1 (16-bit) instructions are optimized for compactness, so every bit is valuable. Merging DN into Rdn would require a 4-bit field to cover all 16 registers. This would force other fields (like Rm here) to shrink, or eat into the operation code space—either way reducing the number of distinct instructions we can fit into 16 bits.
• Hardware decoding simplicity: Low registers (r0–r7) typically have faster, direct access paths in ARM cores. A standalone DN bit lets the decoder immediately route the instruction to the correct register bank logic, avoiding extra cycles needed to decode a longer 4-bit register number.
• Consistency with the instruction set: This pattern repeats across many Thumb-1 instructions. Using a single bit to toggle between low/high register banks lets the set retain full register access while keeping common operations (which rely heavily on low registers) as efficient 16-bit instructions.

内容的提问来源于stack exchange，提问作者Alperen Keleş