基于STM32F429 HAL库实现JTAG协议bit-bang：PWM时钟配合DMA GPIO边沿触发读写的最优方案咨询

Nice approach—using DMA + GPIO with PWM for JTAG bit-banging is exactly the high-speed, low-CPU-overhead method recommended in AN4666. Let’s walk through the optimal HAL-based implementation, step by step, to meet your requirements perfectly.

The core idea is to use a PWM timer to generate your JTAG CLK signal, and pair it with two DMA channels:

• One DMA channel triggers on the PWM falling edge to write your TDI (or other output pin) state via GPIO
• A second DMA channel triggers on the PWM rising edge to read your TDO (or other input pin) state from GPIO

This setup offloads all bit-level operations to hardware, keeping the CPU free for higher-level JTAG logic.

First, set up a timer in PWM mode to generate your CLK pulses. The key here is configuring the timer to trigger DMA requests on both rising and falling edges of the PWM signal.

TIM_HandleTypeDef htim_jtag_clk;
TIM_OC_InitTypeDef sConfigOC;

void MX_TIM_JTAG_CLK_Init(void) {
  // Initialize timer (adjust instance, prescaler, and period for your target CLK frequency)
  htim_jtag_clk.Instance = TIM2;
  htim_jtag_clk.Init.Prescaler = 0; // Match your APB timer clock to get desired speed
  htim_jtag_clk.Init.CounterMode = TIM_COUNTERMODE_UP;
  htim_jtag_clk.Init.Period = 100; // Determines CLK period (adjust for your bit rate)
  htim_jtag_clk.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  HAL_TIM_PWM_Init(&htim_jtag_clk);

  // Configure PWM channel for 50% duty cycle (symmetric CLK)
  sConfigOC.OCMode = TIM_OCMODE_PWM1;
  sConfigOC.Pulse = htim_jtag_clk.Init.Period / 2;
  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  HAL_TIM_PWM_ConfigChannel(&htim_jtag_clk, &sConfigOC, TIM_CHANNEL_1);

  // Enable DMA triggers for rising/falling edges
  // Use CC1 for falling edge (write TDI) and CC2 for rising edge (read TDO)
  __HAL_TIM_DMA_REQUEST_ENABLE(&htim_jtag_clk, TIM_DMA_CC1);
  __HAL_TIM_DMA_REQUEST_ENABLE(&htim_jtag_clk, TIM_DMA_CC2);

  // Configure CC2 to trigger on rising edge of CLK
  TIM_IC_InitTypeDef sConfigIC = {0};
  sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
  sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
  sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
  sConfigIC.ICFilter = 0;
  HAL_TIM_IC_ConfigChannel(&htim_jtag_clk, &sConfigIC, TIM_CHANNEL_2);
}

Set up your GPIO pins for JTAG signals:

• Output pin (TDI): Use push-pull output with very high speed (to handle fast edges)
• Input pin (TDO): Use floating or pull-up input, also with high speed

void MX_GPIO_Init(void) {
  GPIO_InitTypeDef GPIO_InitStruct = {0};

  __HAL_RCC_GPIOA_CLK_ENABLE();

  // TDI (Output)
  GPIO_InitStruct.Pin = GPIO_PIN_0;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

  // TDO (Input)
  GPIO_InitStruct.Pin = GPIO_PIN_1;
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

  // CLK (PWM Output)
  GPIO_InitStruct.Pin = GPIO_PIN_2;
  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}

Set up two DMA channels: one for writing TDI (memory → GPIO BSRR) and one for reading TDO (GPIO IDR → memory). Using BSRR instead of ODR for writes ensures atomic pin state changes (no read-modify-write overhead).

DMA_HandleTypeDef hdma_tdi_write;
DMA_HandleTypeDef hdma_tdo_read;

#define NUM_PULSES 1000 // Adjust to your required number of CLK pulses
uint32_t tdi_buffer[NUM_PULSES]; // Stores BSRR masks for each TDI state
uint32_t tdo_buffer[NUM_PULSES]; // Stores captured TDO states

void MX_DMA_Init(void) {
  __HAL_RCC_DMA1_CLK_ENABLE();

  // DMA for TDI Write (memory → GPIO BSRR)
  hdma_tdi_write.Instance = DMA1_Channel1;
  hdma_tdi_write.Init.Direction = DMA_MEMORY_TO_PERIPH;
  hdma_tdi_write.Init.PeriphInc = DMA_PINC_DISABLE; // Fixed address (GPIO BSRR)
  hdma_tdi_write.Init.MemInc = DMA_MINC_ENABLE; // Increment memory pointer each transfer
  hdma_tdi_write.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
  hdma_tdi_write.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
  hdma_tdi_write.Init.Mode = DMA_NORMAL; // Stop after NUM_PULSES transfers
  hdma_tdi_write.Init.Priority = DMA_PRIORITY_HIGH; // TDI timing is critical
  HAL_DMA_Init(&hdma_tdi_write);

  // Link DMA to timer's CC1 (falling edge) trigger
  __HAL_LINKDMA(&htim_jtag_clk, hdma[TIM_DMA_ID_CC1], hdma_tdi_write);

  // DMA for TDO Read (GPIO IDR → memory)
  hdma_tdo_read.Instance = DMA1_Channel2;
  hdma_tdo_read.Init.Direction = DMA_PERIPH_TO_MEMORY;
  hdma_tdo_read.Init.PeriphInc = DMA_PINC_DISABLE; // Fixed address (GPIO IDR)
  hdma_tdo_read.Init.MemInc = DMA_MINC_ENABLE; // Increment memory pointer each transfer
  hdma_tdo_read.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
  hdma_tdo_read.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
  hdma_tdo_read.Init.Mode = DMA_NORMAL;
  hdma_tdo_read.Init.Priority = DMA_PRIORITY_MEDIUM;
  HAL_DMA_Init(&hdma_tdo_read);

  // Link DMA to timer's CC2 (rising edge) trigger
  __HAL_LINKDMA(&htim_jtag_clk, hdma[TIM_DMA_ID_CC2], hdma_tdo_read);
}

Prepare your TDI data, launch the DMA transfers, and start the PWM timer. You can use interrupts instead of polling for transfer completion to free up the CPU.

void Start_JTAG_Bitbang(void) {
  // Populate TDI buffer: set pin high with GPIO_PIN_0, low with GPIO_PIN_0 << 16
  for (uint32_t i = 0; i < NUM_PULSES; i++) {
    tdi_buffer[i] = (your_jtag_tdi_sequence[i]) ? GPIO_PIN_0 : (GPIO_PIN_0 << 16);
  }

  // Start DMA transfers
  HAL_DMA_Start(&hdma_tdi_write, (uint32_t)tdi_buffer, (uint32_t)&GPIOA->BSRR, NUM_PULSES);
  HAL_DMA_Start(&hdma_tdo_read, (uint32_t)&GPIOA->IDR, (uint32_t)tdo_buffer, NUM_PULSES);

  // Start PWM CLK and IC capture for rising edge trigger
  HAL_TIM_PWM_Start(&htim_jtag_clk, TIM_CHANNEL_1);
  HAL_TIM_IC_Start(&htim_jtag_clk, TIM_CHANNEL_2);

  // Wait for transfers to complete (replace with interrupts for better efficiency)
  while (HAL_DMA_GetState(&hdma_tdi_write) != HAL_DMA_STATE_READY);
  while (HAL_DMA_GetState(&hdma_tdo_read) != HAL_DMA_STATE_READY);

  // Cleanup
  HAL_TIM_PWM_Stop(&htim_jtag_clk, TIM_CHANNEL_1);
  HAL_TIM_IC_Stop(&htim_jtag_clk, TIM_CHANNEL_2);
}

• Use BSRR for GPIO writes: This avoids read-modify-write cycles, ensuring atomic pin state changes and faster operation.
• Interrupt-driven completion: Replace polling with HAL_DMA_Start_IT() and implement HAL_DMA_TransferCompleteCallback() to handle transfer completion without blocking the CPU.
• Memory alignment: Ensure your DMA buffers are 4-byte aligned (use __attribute__((aligned(4))) if needed) to avoid hardware errors.
• Clock speed: Verify your timer and GPIO clocks are set to support your target bit rate—higher clock speeds allow faster JTAG operations.

• Check trigger mapping: Ensure your timer's DMA requests are correctly mapped to the right edges (use CubeMX to verify peripheral settings if needed).
• Scope verification: Use an oscilloscope to confirm CLK, TDI, and TDO timing align with JTAG specs (TDI stable on CLK falling edge, TDO sampled on CLK rising edge).
• GPIO speed: Always set GPIO speed to very high—slow speed settings introduce edge delays that break synchronization.

内容的提问来源于stack exchange，提问作者Samer Sadek