Clash/Haskell构建时'Unbound implicit parameters'错误解决

我正在参考Clash官方文档和FPGA入门教程，构建一个简单的LED翻转电路。

初始代码 #

module LED2 where

-- ref Clash官方教程

import Clash.Prelude
import Clash.Intel.ClockGen
import Clash.Annotations.SynthesisAttributes

import Clash.Annotations.TH

topEntity ::
  "CLOCK_50" ::: Clock IntelSystem --clk
    `Annotate` 'StringAttr "chip_pin" "R8"
    `Annotate` 'StringAttr "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\"" ->
  "KEY0" ::: Reset IntelSystem -- reset BTN
    `Annotate` 'StringAttr "chip_pin" "J15"
    `Annotate` 'StringAttr "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\"" ->
  "KEY1" ::: Signal IntelSystem Bit -- input BTN
    `Annotate` 'StringAttr "chip_pin" "E1"
    `Annotate` 'StringAttr "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\"" ->
  "LED" ::: Signal IntelSystem Bit  -- output LED
    `Annotate` 'StringAttr "chip_pin" "A15"
    `Annotate` 'StringAttr "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\""

topEntity clk rst key1 =
    let  (pllOut,pllStable) = altpll @IntelSystem (SSymbol @"altpll50") clk rst
         rstSync            = resetSynchronizer pllOut (unsafeFromHighPolarity pllStable)
    in   exposeClockResetEnable leds pllOut rstSync enableGen
    where
      leds   = mealy ledT (1, False) key1R
      key1R  = isRising 1 key1

ledT (led,mode) key1R = ((led',mode'),led)
  where
    mode' | key1R     = not mode
          | otherwise = mode

    led' = if mode then complement led else led

编译错误 #

第一次编译时，编译器报出未绑定隐式参数错误：

/home/jin/Lab4/de0/src/LED2.hs:31:16: error:
    • Unbound implicit parameters
        (ghc-prim-0.7.0:GHC.Classes.IP
           (Clash.Signal.HiddenClockName IntelSystem) (Clock IntelSystem),
         ghc-prim-0.7.0:GHC.Classes.IP
           (Clash.Signal.HiddenEnableName IntelSystem) (Enable IntelSystem),
         ghc-prim-0.7.0:GHC.Classes.IP
           (Clash.Signal.HiddenResetName IntelSystem) (Reset IntelSystem))
        arising from a use of ‘isRising’
    • In the expression: isRising 1 key1
      In an equation for ‘key1R’: key1R = isRising 1 key1
      In an equation for ‘topEntity’:
          topEntity clk rst key1
            = let
                (pllOut, pllStable)
                  = altpll @IntelSystem (SSymbol @"altpll50") clk rst
                rstSync
                  = resetSynchronizer pllOut (unsafeFromHighPolarity pllStable)
              in exposeClockResetEnable leds pllOut rstSync enableGen
            where
                leds = mealy ledT (1, False) key1R
                key1R = isRising 1 key1
   |
31 |       key1R  = isRising 1 key1

即使将key1R改为key1R = pure False，错误依然存在，这次错误来自mealy调用：

/home/jin/Lab4/de0/src/LED2.hs:30:16: error:
    • Unbound implicit parameters
        (ghc-prim-0.7.0:GHC.Classes.IP
           (Clash.Signal.HiddenClockName IntelSystem) (Clock IntelSystem),
         ghc-prim-0.7.0:GHC.Classes.IP
           (Clash.Signal.HiddenEnableName IntelSystem) (Enable IntelSystem),
         ghc-prim-0.7.0:GHC.Classes.IP
           (Clash.Signal.HiddenResetName IntelSystem) (Reset IntelSystem))
        arising from a use of ‘mealy’
    • In the expression: mealy ledT (1, False) key1R
      In an equation for ‘leds’: leds = mealy ledT (1, False) key1R
      In an equation for ‘topEntity’:
          topEntity clk rst key1
            = let
                (pllOut, pllStable)
                  = altpll @IntelSystem (SSymbol @"altpll50") clk rst
                rstSync
                  = resetSynchronizer pllOut (unsafeFromHighPolarity pllStable)
              in exposeClockResetEnable leds pllOut rstSync enableGen
            where
                leds = mealy ledT (1, False) key1R
                key1R = pure False
   |
30 |       leds   = mealy ledT (1, False) key1R

解决方法 #

将topEntity中where块的定义直接嵌入exposeClockResetEnable的参数中，移除where块后，代码成功编译。修改后的代码如下：

topEntity clk rst key1 =
    let  (pllOut,pllStable) = altpll @IntelSystem (SSymbol @"altpll50") clk rst
         rstSync            = resetSynchronizer pllOut (unsafeFromHighPolarity pllStable)
    in   exposeClockResetEnable (mealy ledT (1, False) (isRising 1 key1)) pllOut rstSync enableGen

原因说明 #

exposeClockResetEnable的作用是将显式的时钟、复位、使能参数注入到需要隐式参数的函数中，但它的作用范围仅覆盖其第一个参数表达式。原代码中where块里的leds和key1R定义不在这个作用域内，因此无法获取到所需的隐式参数。将这些调用直接放到exposeClockResetEnable的参数里，就能让隐式参数正确绑定，从而解决编译错误。

内容的提问来源于stack exchange，提问作者Jin